The present disclosure relates to field effect transistors made of group III nitride semiconductors and applicable to power transistors for use in, for example, power supply circuits in consumer apparatuses etc.
Group III nitride semiconductors which are compound semiconductors represented by gallium nitride (GaN) have wider band gaps, high breakdown field strength and high saturated drift velocity of electrons, as compared to silicon (Si), gallium arsenide (GaAs), etc. In a heterostructure of aluminum gallium nitride (AlGaN)/gallium nitride (GaN) formed on a substrate whose main surface has a (0001) plane orientation (C plane), two-dimensional electron gas (2DEG) is generated at a heterointerface due to spontaneous polarization and piezo-polarization, and a sheet carrier concentration of 1×1013 cm−2 or more is obtained even when impurities are not doped. Particular attention has been recently drawn to field effect transistors (FETs) using such a high concentration 2DEG as a carrier, and various configurations have been proposed.
When GaN-based FETs are used, power transistors with lower power dissipation can be provided, but the element area is relatively large, and therefore, it has been desired to form GaN-based nitride semiconductors on an inexpensive conductive substrate, such as silicon (Si) or graphite (C), rather than an expensive sapphire substrate. However, if such GaN-based nitride semiconductors are formed on such a hetero-substrate, since the lattice constant and the coefficient of thermal expansion of the substrate are different from those of the nitride semiconductors, problems are likely to occur where a larger thickness of the nitride semiconductors allows a wafer to be bend, cracks to enter semiconductor films which have grown. Therefore, it is important to ensure the breakdown voltage and reliability of the semiconductors while reducing the thickness of the semiconductors as thin as possible.
FIG. 12 illustrates a schematic cross-sectional configuration of a conventional field effect transistor having an AlGaN/GaN heterostructure (for example, see Japanese Patent Publication No. 2007-251144).
As shown in FIG. 12, the conventional field effect transistor made of group III nitride semiconductors includes a low-temperature GaN buffer layer 12, a high resistance buffer layer made of GaN or AlGaN, an undoped GaN layer 14, and an undoped AlGaN layer 15 which are sequentially formed on a substrate 11. A source electrode 16 and a drain electrode 18 made of Ti and Al are formed on the undoped AlGaN layer 15. A gate electrode 17 made of Ni, Pt, and Au is formed in a region between the source electrode 16 and the drain electrode 18 on the undoped AlGaN layer 15.
The field effect transistor having such a configuration utilizes, as a carrier, two-dimensional electron gas formed on an interface between the undoped AlGaN layer 15 and the undoped GaN layer 14. When a voltage is applied between the source electrode 16 and the drain electrode 18, electrons in a channel drift from the source electrode 16 toward the drain electrode 18. At that time, a voltage applied to the gate electrode 17 is controlled to change the thickness of a depletion layer of the undoped AlGaN layer 15 located directly under the gate electrode 17, thereby making it possible to control the electrons drifting from the source electrode 16 to the drain electrode 18, thus, drain current.
In FETs made of GaN-based semiconductors, it has been known that a phenomenon called current collapse is observed, resulting in a problem when a device is operated. This is a phenomenon where, once a strong electric field is applied, for example, between a source and a drain, between the source and a gate, or between the drain and a substrate, then, channel current between the source and the drain decreases. In Japanese Patent Publication No. 2007-251144, a voltage between a drain and a source in the on state is swept in a range of 0 V-10V and 0 V-30 V, and a ratio of the obtained current value is defined as a current collapse value. Moreover, Japanese Patent Publication No. 2007-251144 discloses that, if the concentration of carbon added into a high resistance buffer layer 13 is 1017 cm−3 or more and 1020 cm−3 or less, or the thickness measured from the two-dimensional electron gas layer to the upper surface of the high resistance buffer layer 13 (hereinafter referred to as a channel layer) is 0.05 μm or more, current collapse is reduced enough not to cause practical problems. It also discloses that the carbon concentration of the high resistance buffer layer 13 of 1017 cm−3 or more, and the thickness of the channel layer of 1 μm or less can ensure the breakdown voltage of 400 V or more, which is necessary for a commercial power supply.